8:00-9:00 |
- Registration, material distribution |
9:00 |
Introduction - Welcome and Overview[Presentation (Ed Roback and Jim Foti)] |
9:20 |
Session 1: "FPGA Evaluations"An FPGA Implementation and Performance Evaluation of the AES Block Cipher Candidate Algorithm Finalists A Comparison of the AES Candidates Amenability to FPGA Implementation Comparison of the hardware performance of the AES candidates using reconfigurable hardware
|
10:30 |
Coffee Break |
11:00 |
Session 2: "Platform-Specific Evaluations"AES Finalists on PA-RISC and IA-64: Implementations & Performance A comparison of AES candidates on the Alpha 21264 Performance Evaluation of AES Finalists on the High-End Smart Card How Well Are High-End DSPs Suited for the AES Algorithms? AES Algorithms on the TMS320C6x DSP Fast Implementations of AES Candidates
|
12:30 |
Lunch (provided) |
14:00 |
Session 3: "Surveys"A Performance Comparison of the Five AES Finalists Efficiency Testing of ANSI C Implementations of Round 2 Candidate Algorithms for the Advanced Encryption Standard NIST Performance Analysis of the Final Round JavaTM AES Candidates Performance of the AES Candidate Algorithms in Java
|
15:00 |
Coffee Break |
15:30- |
Session 4: "Cryptographic Analysis and Properties (I)"MARS Attacks! Preliminary Cryptanalysis of Reduced-Round MARS Variants Impossible Differential on 8-Round MARS' Core Preliminary Cryptanalysis of Reduced-Round Serpent
|
17:15 |
Reception- Cash bar and hors d'oeuvres
|
18:30- |
Recent Results ("Rump") SessionPresentations:
|
8:00-8:30 |
- Registration, material distribution |
8:30 |
Session 5: "Cryptographic Analysis and Properties (II)"Attacking Seven Rounds of Rijndael under 192-bit and 256-bit Keys A collision attack on 7 rounds of Rijndael Relationships among Differential, Truncated Differential, Impossible Differential Cryptanalyses against Word-Oriented Block Ciphers like RIJNDAEL, E2
|
9:45 |
Coffee Break |
10:15 |
Session 6: "AES Issues" PanelAES and Future Resiliency: More Thoughts And Questions The Effects of Multiple Algorithms in the Advanced Encryption Standard
|
11:15 |
Short Stretch Break (NO Coffee) |
11:30 |
Session 7: "ASIC Evaluations / Individual Algorithm Testing"Hardware Evaluation of the AES Finalists Hardware Performance Simulations of Round 2 Advanced Encryption Standard Algorithms High-Speed MARS Hardware Speeding up Serpent
|
12:45 |
Lunch (provided) |
14:15 |
Session 8: "Algorithm Submitter Presentations" (with submitter Q&A)- Fifteen-minute presentations by each of the finalist algorithm submitters. Written statements by the submitters were provided at the conference. Two photos of the submitter panel, courtesy of Markus Dichtl: 1, 2
|
15:45 |
Coffee Break |
16:15 |
Session 8, continued: "Audience Q&A and Remaining Issues for the AES Development Effort"- Continued discussion involving the audience and the finalist algorithm submitters.
|
17:15 |
Future Plans and Closing[Presentation (Ed Roback)] -At the end of the conference, all attendees had the opportunity to fill out a NIST Conference Feedback Form. Here is a summary. |
17:30 |
Adjourn |
Last Modified: May 16, 2000 (added presentation for Worley)
Technical contact: Morris
Dworkin
Administrative/process questions: Elaine
Barker, Bill Burr