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Projects Cryptographic Algorithm Validation Program

Cryptographic Algorithm Validation Program CAVP

Implementation Name
BigIP B7000 TMM Implementation
Description
F5® BIG-IP® Application Delivery Controller and Firewall software running on F5 BIG-IP.
Version
13.1.0 (Firmware)
Type
SOFTWARE
Vendor
F5 Networks
401 Elliott Avenue West
Seattle, WA 98119
USA
Contacts
Maryrita Steinhour
m.steinhour@f5.com
206-272-7351
John Hughes
j.hughes@f5.com
206-272-6038

RSA 2651

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 RSA SigGen (FIPS186-4) Expand
Intel(R) Xeon(R) CPU E3-1275 RSA SigVer (FIPS186-4) Expand

AES 4832

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 AES-CBC Expand
Intel(R) Xeon(R) CPU E3-1275 AES-GCM Expand
Intel(R) Xeon(R) CPU E3-1275 AES-GMAC Expand

Component 1463

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 KAS-ECC CDH-Component Expand
Intel(R) Xeon(R) CPU E3-1275 KAS-ECC Component Expand

SHS 3974

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 SHA-1 Expand
Intel(R) Xeon(R) CPU E3-1275 SHA2-256 Expand
Intel(R) Xeon(R) CPU E3-1275 SHA2-384 Expand

Component 1464

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 KDF TLS Expand

HMAC 3233

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 HMAC-SHA-1 Expand
Intel(R) Xeon(R) CPU E3-1275 HMAC-SHA2-256 Expand
Intel(R) Xeon(R) CPU E3-1275 HMAC-SHA2-384 Expand

DRBG 1691

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 Counter DRBG Expand

ECDSA 1229

   First Validated: 11/3/2017
Operating Environment Algorithm Capabilities
Intel(R) Xeon(R) CPU E3-1275 ECDSA KeyGen (FIPS186-4) Expand
Intel(R) Xeon(R) CPU E3-1275 ECDSA KeyVer (FIPS186-4) Expand
Intel(R) Xeon(R) CPU E3-1275 ECDSA SigGen (FIPS186-4) Expand
Intel(R) Xeon(R) CPU E3-1275 ECDSA SigVer (FIPS186-4) Expand

Created October 05, 2016, Updated March 07, 2023