The consideration of masked circuits, as an approach related to secret sharing, started with the threshold cryptography project. The project then considered two separate tracks (single-device and multi-party). He single-deice track evolved to become the "masked circuits for block-cipher circuits" project. Early public feedback about the single-device threshold setting was received in talks at the NTCW 2019 workshop (sessions II.1 and II.2), comments provided for NISTIR 8214 (see the diff) and 8214A (see the diff) and a related workshop organized by KULeuven (July 2020).

Identifying reference approaches: The research literature describes various possible approaches to enable resistance against side-channel attacks, under various models. Often there are tradeoffs between implementation/operation cost (e.g., area, energy, randomness) and security (e.g., protection order against certain side-channel attacks).

As of the 1st half of 2021, the project is considering criteria for secure masked implementation schemes. We are thinking about how to engage further with the community in the 2nd half of 2021. In particular, it will be useful to identify reference approaches that will ease the description, comparison and discussion of possible variants.

The discussions ahead will involve considerations on:

•  Algorithm vs. implementation profiles: the masking techniques are defined at the algorithmic level, but their effectiveness relies on some hardware implementation assumptions. It is useful to characterize the implementation profiles for which the proposed algorithmic techniques will improve the expected resistance against side channel attacks.
•  Usefulness to the industry: the success of new standards will depend on an alignment with not only improved security but also their adoptability by the industry.