Projects
Cryptographic Algorithm Validation Program
Cryptographic Algorithm Validation Program CAVP
Description
The MX MUX/DEMUX FPGA code with Encryption implements the AES algorithm for Ethernet traffic encryption and decryption inside the Microwave Networks Inc cryptographic module (channel unit) in the MX configuration.
Version
FPGA Code Part Number: 4600163-01, Rev. 1.A; FPGA IC Part Number: 2320284-01, Rev. RB
Vendor
Contacts
Ben Lee
BenL@microwavenetworks.com
281-263-6569
Fax: 281-263-6400
Angelos Liveris
AngelosL@microwavenetworks.com
281-263-6701
Operating Environment |
Algorithm Capabilities |
PROG,FPGA,MUX/DEMX,w/ ENCRYPTION,MX (4600163-01A)
|
AES-OFB
Expand
|
Created October 05, 2016, Updated November 24, 2020