Lightweight Cryptography

Performance Benchmarking

In January 2022, the George Mason University Cryptographic Engineering Research Group (CERG) team published three calls to assist in evaluating protected implementations of the finalists:

• Call for Protected Hardware Implementations, targeting low-cost modern FPGAs
• Call for Protected Software Implementations, targeting low-cost modern embedded processors
• Call for Side-Channel Security Evaluation Labs

The NIST team encourages submitters and third parties to contribute to this initiative. 

Performance benchmarking results are provided in the following pages:

• Microcontroller Benchmarking by NIST LWC team
• AVR/ARM Microcontroller Benchmarking by R. Weatherley
• AVR/ARM/RISC-V Microcontroller Benchmarking by S. Renner, E. Pozzobon, and J. Mottok
• RISC-V Benchmarking by F. Campos, L. Jellema, M. Lemmen, L. Müller, D. Sprenkels, and B. Viguier
• eBACS (ECRYPT Benchmarking of Cryptographic Systems): General-purpose Processor (Intel, AMD, ARM Cortex-A, Qualcomm) Benchmarking
• FPGA Benchmarking by K. Mohajerani, R. Haeussler, R. Nagpal, F. Farahmand, A. Abdulgadir, J.-P Kaps, and K. Gaj
• ASIC Benchmarking by M. Khairallah, T. Peyrin, and A. Chattopadhyay
• ASIC Benchmarking by M. D. Aagaard and N. Zidarič